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This paper presents a novel cross-coupled current conveyor based CMOS transimpedance amplifier (TIA) design to obtain an input capacitive load insensitive and very low noise structure. The proposed structure is presented with an implementation in GlobalFoundries' 0.18-μm 1.8-V industry compatible CMOS technology. The whole TIA circuit consumes only 31.5 mW of dc power. Measured results show a -3 dB bandwidth of about 4 GHz with a 0.25 pF photodiode capacitance. The single-ended transimpedance gain for positive output port is 46 dBΩ. The measured single-ended input-referred noise current spectral density is kept below 18 pA/√Hz within the TIA frequency band. The optical sensitivity for a bit-error-rate of 10⁻¹² is -15 dBm with 4.25 Gb/s 2³¹-1 proactivebreak Reed-Solomon bypass data pattern. This cross-coupled structure also facilitates building an input-insensitive differential TIA. The simulation result shows a stable frequency response over a wide range of input capacitance from 0.05 to 0.5 pF.
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on (Volume:PP , Issue: 99 )