A 27–34 GHz CMOS medium power amplifier with a flat power performance

This paper presents a 27-34 GHz medium power amplifier in 65-nm CMOS technology. The amplifier is designed to amplify the LO signals from the 30-GHz VCO in a 60-GHz sub-harmonic direct-conversion system. The proposed amplifier achieves a measured gain of higher than 22.8 dB from 27 to 34 GHz, and the gain deviation is within 1 dB. The measured results show a PAE up to 13% at 1-dB compression power (P
_1dB
), and a 7.7-dBm P
_1dB
at 30 GHz. The peak PAE and the saturation power (P
_sat
) are 23.3% and 10.6 dBm at 30 GHz, respectively. The P
_1dB
is between 6.8 and 7.7 dBm while the P
_sat
is between 9.7 and 10.8 dBm from 27 to 34 GHz. The chip size is 0.36 mm
²
including all testing pads.