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Field programmable gate array system for real-time IRIS recognition

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5 Author(s)
Amirshahram Hematian ; Adv. Inf. Sch., Univ. Teknol. Malaysia, Kuala Lumpur, Malaysia ; Azizah Abdul Manaf ; Suriayati Chuprat ; Reza Khaleghparast1
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Iris recognition is one of the most flawless recognition methods in biometrics. However, most of iris recognition algorithms are implemented based on sequential operations running on central processing units (CPUs). In this article we propose a prototype design for iris recognition based on field-programmable gate array (FPGA) in order to improve iris recognition performance by parallel computing. Time-consuming iris recognition sub-processes are fully implemented in parallel to achieve optimum performance. Unlike commonly used iris recognition methods that first capture a single image of an eye and then start the recognition process, we achieved to speed up the iris recognition process by localizing the pupil and the iris boundaries, unwrapping the iris image and extracting features of the iris image while image capturing was in progress. Consequently, live images from human eye can be processed continuously without any delay. We conclude that iris recognition acceleration by parallel computing can be a complete success when it is implemented on low-cost FPGAs.

Published in:

Open Systems (ICOS), 2012 IEEE Conference on

Date of Conference:

21-24 Oct. 2012