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This brief presents an ultra-low voltage split-data-aware 10T and 8T (SDA-10T-8T) embedded static random access memory (SRAM) design for MPEG-4 video processors. Without additional complex peripheral circuits, the proposed design enables a reliable operation at 0.36 V under process variation and aging effect. The experimental results based on 45-nm CMOS technology show that, as compared to conventional SRAM design, our proposed design can achieve a 95% reduction in active power, with no significant degradation in frame quality. In addition, the proposed design suppresses the leakage current effectively, thereby reducing the leakage induced bitline voltage drop rate from 1.54 mV/ns to 0.64 mV/ns at Vdd = 0.36 V.
Circuits and Systems II: Express Briefs, IEEE Transactions on (Volume:59 , Issue: 12 )
Date of Publication: Dec. 2012