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Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS

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15 Author(s)
Fick, D. ; Univ. of Michigan, Ann Arbor, MI, USA ; Dreslinski, R.G. ; Giridhar, B. ; Gyouho Kim
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We present Centip3De, a large-scale 3D CMP with a cluster-based near-threshold computing (NTC) architecture. Centip3De uses a 3D stacking technology in conjunction with 130 nm CMOS. Measured results for a two-layer, 64-core system are discussed, with the system achieving 3930 DMIPS/W energy efficiency, which is >; 3x improvement over traditional operation at full supply voltage. This project demonstrates the feasibility of large-scale 3D design, a synergy between 3D and NTC architectures, a unique cluster-based NTC cache design, and how to maximize performance in a thermally-constrained design.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:48 ,  Issue: 1 )