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Low-Power Level Shifter for Multi-Supply Voltage Designs

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3 Author(s)
Lanuzza, M. ; Dept. of Electron., Comput. Sci., & Syst., Univ. of Calabria, Arcavacata di Rende, Italy ; Corsonello, P. ; Perri, S.

In this brief, a new low-power level shifter (LS) is presented for robust logic voltage shifting from near/sub-threshold to above-threshold domain. The new circuit combines the multi-threshold CMOS technique along with novel topological modifications to guarantee a wide voltage conversion range with limited static power and total energy consumption. When implemented in a 90-nm technology process, the proposed design reliably converts 180-mV input signals into 1-V output signals, while maintaining operational frequencies above 1-MHz, also taking into account process-voltage-temperature variations.Post-layout simulation results demonstrate that the new LS reaches a propagation delay less than 22 ns, a static power dissipation of only 6.4 nW, and a total energy per transition of only 74 fJ for a 0.2-V 1-MHz input pulse.

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Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:59 ,  Issue: 12 )