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A novel three-phase software phase-locked loop based on frequency-locked loop and initial phase angle detection phase-locked loop

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3 Author(s)
Liang Wang ; Dept. of Electr. Eng., Tsinghua Univ., Beijing, China ; Qirong Jiang ; Lucheng Hong

This paper proposes a new three-phase software phase-locked loop (SPLL) which operates fast and accurately in unbalanced, polluted and frequency deviated circumstances. This new proposed SPLL consists of frequency-locked loop (FLL) and initial phase angle detection PLL. The FLL employs differential algorithm to detect frequency error which could immune to phase jumps and voltage sharp changes. A frequency adaptive digital filter (FADF) is included in FLL to reject harmonics. The FADF uses two strategies to sweep away disturbing signals in a synchronous reference domain. Firstly, specific order harmonics are eliminated by multistage application of delayed signal cancellation (DSC) using estimated delayed signals. Excellent steady-state performance of multistage DSC to reject harmonics is achieved with the help of FLL and interpolation strategy. Secondly, a conventional low-pass (LP) filter damps the rest higher frequency harmonics and noises. Initial phase angle detection PLL could have a high cutoff frequency due to good performance of FADF. Simulations prove the new SPLL responds fast and has precise steady-state output.

Published in:

IECON 2012 - 38th Annual Conference on IEEE Industrial Electronics Society

Date of Conference:

25-28 Oct. 2012