Referenced Items are not available for this document.
The MasPar MP-1 architecture is described. It is a massively parallel SIMD machine with the following key characteristics: scalable architecture in terms of the number of processing elements, system memory, and system communication bandwidth; reduced-instruction-set-computer-like instruction set design which leverages optimizing compiler technology; adherence to industry-standard floating point formats, specifically VAX and IEEE floating point; and an architectural design amenable to a VLSI implementation. The architecture provides not only high computational capability, but also a mesh and global interconnect style of communication. The computational model and subsystems of the MP-1, including the interconnection mechanisms, are described.<
Published in:
Compcon Spring '90. Intellectual Leverage. Digest of Papers. Thirty-Fifth IEEE Computer Society International Conference.
Date of Conference: Feb. 26 1990-March 2 1990
- Page(s):
- 20 - 24
- Meeting Date :
- 26 Feb 1990-02 Mar 1990
- Print ISBN:
- 0-8186-2028-5
- INSPEC Accession Number:
- 3776087
- Conference Location :
- San Francisco, CA, USA
- Digital Object Identifier :
- 10.1109/CMPCON.1990.63648
- Product Type:
- Conference Publications
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