Tristate Operation in Resistive Switching of $ \hbox{SiO}_{2}$ Thin Films

The effects of incorporating a thin silicon layer into a SiO
₂
-based resistive-switching random access memory are presented. An improved performance, including a lower electroforming voltage and a more stable device current in the high-resistance programmed state, has been achieved by physical vapor deposition of a thin silicon layer onto the sidewall region of the device. Tristate pulse endurance performance over 10
⁶
cycles has been demonstrated. The programmed data show immunity to read disturb testing at 1 V and can be sustained up to 150°C thermal exposure. It is concluded that the improved performance is due to formation of a more robust and more uniform conducting filament. As a result of this advantage, stable tristate programming can be realized in the SiO
₂
-based resistive memory device.