Referenced Items are not available for this document.
The XMOS architecture scales from real-time systems with a single multithreaded processor to systems with thousands of processors. Concurrent processing, communications, and I/O are supported by the instruction set of the XCORE processors and by the message-routing techniques and protocols in the XMOS interconnect. The event-driven architecture supports energy-efficient multicore and multichip systems in which cores are active only when needed.
Published in:
Micro, IEEE
(Volume:32
,
Issue:
6
)
Date of Publication: Nov.-Dec. 2012
- Page(s):
- 28 - 37
- ISSN :
- 0272-1732
- INSPEC Accession Number:
- 13429599
- Digital Object Identifier :
- 10.1109/MM.2012.87
- Product Type:
- Journals & Magazines
- Date of Publication :
- 26 October 2012
- Date of Current Version :
- 13 December 2012
- Issue Date :
- Nov.-Dec. 2012
- Sponsored by :
- IEEE Computer Society
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