By Topic

An 8 Mb Multi-Layered Cross-Point ReRAM Macro With 443 MB/s Write Throughput

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

13 Author(s)
Kawahara, A. ; Panasonic Corp., Kyoto, Japan ; Azuma, R. ; Ikeda, Y. ; Kawai, K.
more authors

An 8-Mb multi-layered cross-point resistive RAM (ReRAM) macro has been developed with 443 MB/s write throughput (64-bits parallel write per 17.2-ns cycle), which is almost twice as fast as competing methods. It uses the fast switching performance of TaOx ReRAM and a new write architecture to reduce the sneak current in a cross-point cell array structure based on an 0.18-μm process. First, a bidirectional diode as a memory cell select element is developed to reduce the sneak current. Second, PMOS and NMOS are used select transistors in the source follower to realize stable switching for the selected cell in the multi-layered cross-point structure. Third, a hierarchical bitline (BL) structure is employed with a short bitline. Fourth, multi-bit write architecture is developed to realize fast write operation and to suppress the sneak current.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:48 ,  Issue: 1 )