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In this paper, two bit storage in single cell floating gate flash memory is simulated and studied using independent gate conventional FinFET and junction-less FET. TCAD simulator is used for generating the memory structure as well as for studying its programming, erasing and reading behaviour. While programming-erasing-reading one of the gates, the other gate can complicate the process. In reading operation it is reflected as a threshold voltage shift. Junctionless FET devices - based flash memory cells are not affected by the other gate whereas the conventional FinFET devices show some degradation w.r.t the noise margin.
Date of Conference: 23-25 Aug. 2012