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Analysis of partitioning between ARM and FPGA on performance characteristics

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3 Author(s)
Parthasarathy, T.R. ; Dept. of ECE, Shanmuganthan Eng. Coll., Pudukkottai, India ; Venkatakrishnan, N. ; Balamurugan, K.

The main aim of this paper is to improvise the SoC based custom design in the academic side. In this paper, the partitioning between ARM and FPGA on performance characteristics is discussed. The ARM devices made a vital role in the conventional embedded applications design. Nowadays the FPGA are mainly used not only for logic design and also the system design with embedded technology or digital signal processing principles. The FPGA's performance measure is taken for conventional counter application which follows the state diagram approach using Verilog HDL and RISC IP core based embedded application design. By comparing RISC CPU based counter logic with FSM based counter logic, the Custom CPU based design produces the faster output response than FSM based design however it occupied large chip area. As a conclusion, custom CPU based logic system design occupies large chip area so this logic cannot be used for area efficient application design. Finally we designed the Mono Alphabetic Encryption/ Decryption Algorithm by partitioning ARM Cortex M3-LM3S608 and Xilinx FPGA XC3S400. The same logic was designed and verified with ARM 7TDMI-LPC 2148 Microcontroller also. The devices are selected based on its feature that is, the Multi Core Multiple Output Parallel LFSR logic was implemented using FPGA and Encryption/Decryption, serial communication logic were implemented in ARM. The results shows the preliminary logic for developing SoC.

Published in:

Advanced Communication Control and Computing Technologies (ICACCCT), 2012 IEEE International Conference on

Date of Conference:

23-25 Aug. 2012

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