Skip to Main Content
This paper proposes a high speed bidirectional mixed-voltage I/O buffer using 90 nm 1.2 V standard CMOS process. By using a dynamic gate bias generator to provide appropriate gate drive voltages for the output stage, the I/O buffer can transmit/receive 2 × VDD voltage level signal without any gate-oxide overstress hazard. Most important of all, the gate-oxide overstress hazard is eliminated by adopting a dual-path gate-tracking circuit. The maximum data rate and jitter are measured to be 800 Mbps/12.37 ps and 704 Mbps/14.79 ps for 1.2 V and 2.5 V signal voltage, respectively, with a given capacitive load of 20 pF.
Circuits and Systems I: Regular Papers, IEEE Transactions on (Volume:60 , Issue: 1 )
Date of Publication: Jan. 2013