It is shown that low levels of copper contamination present on pre-oxidation silicon surfaces significantly affect not only the area, but also the field overlap defect density of the gate oxide. The gate oxide yield loss associated with the field overlap defects will dominate in circuits with device dimensions below 10 μm
Published in:
Advanced Semiconductor Manufacturing Conference and Workshop, 1997. IEEE/SEMI
Date of Conference: 10-12 Sep 1997