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Vacuum electronics (VE) have dominated development and industrial growth in their application areas from the end of the 19th century to the end of 20th century. VE have contributed to basic concepts of physics and have enabled important basic inventions. Despite this bright past, in the meantime also a complete or partial replacement by new technologies such as solid-state electronics (SSE) occurred in several applications areas, triggered by the demand for new features and leading to new applications. Based on a review of the historical development of vacuum electronics from the basic inventions to the modern state of the art, the aim of this paper is to identify future trends and prospects of this field. The appearance of generic technology cycles, as in the case of radio-receiving tubes and cathode-ray display tubes, is discussed. Microwave tubes did experience only a partial replacement by solid-state devices and defended the high-power, high-frequency domain. The reason for their superiority in this domain is discussed. The development of the base technologies for VE, namely vacuum technology and electron source technology, is outlined, enabling further improvements. Besides the high-power, high-frequency domain of microwave tubes, VE technology applications with positive future prospects are addressed, e.g., space applications (long-lived microwave tubes, ion thrusters); thermionic energy converters; e-beam lithography; x-ray tubes; vacuum-based high-resolution characterization, and high-brightness beams for free electron lasers or particle accelerators. The continuous growth and increase in performance of solid-state electronics is shortly reviewed, SSE taking the lead with respect to total sales in the 1980s. Now, despite inherent advantages, solid-state electronics also seem to approach technical limitations. These include increasing energy consumption in conjunction with reduced long-term reliability when further scaling down. It is envisioned that vacuum- nanoelectronics can help to overcome these limitations when scaling down feature sizes of integrated circuits below 22 nm.