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Self-Organisation in Micro-Configurable Hardware

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4 Author(s)

This paper reports on a model situated between the biological and the artificial scenario using a second generation, massively parallel reconfigurable computer — POLYP — based on the Xilinx micro-reconfigurable field programmable gate arrays (FPGAs, 6200 series) with additional distributed SRAM memory circuits under local control and broad-hand dynamically reroutable optical interconnect technology. It is shown that self-organisation of clocked Boolean networks indeed is possible where logical description and execution evolve concomittently. SeIf-replicators emerge, evolution over long timescales show the rise and fall of certain species and an inherent mutation control is established.