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Device Design Guidelines for Nanoscale FinFETs in RF/Analog Applications

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10 Author(s)
Chang-Woo Sohn ; Dept. of Electr. Eng., Pohang Univ. of Sci. & Technol., Pohang, South Korea ; Chang Yong Kang ; Rock-Hyun Baek ; Do-Young Choi
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This letter proposes simple guidelines to design nanoscale fin-based multigate field-effect transistors (FinFETs) for radio frequency (RF)/analog applications in terms of fin height and fin spacing. Geometry-dependent capacitive and resistive parasitics are evaluated using analytic models and are included in a small-signal circuit. It is found that reducing the fin-spacing-to-fin-height ratio of FinFETs, as long as it is compatible with the process integration, is desirable for improving RF performance. This is because the current-gain cutoff frequency and the maximum oscillation frequency are affected by decreasing parasitic capacitance more than by increasing series resistance.

Published in:

Electron Device Letters, IEEE  (Volume:33 ,  Issue: 9 )