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This letter investigates low-frequency noise (LFN) in polycrystalline silicon thin-film transistor (TFT) nonvolatile memory (NVM) under Fowler-Nordheim tunneling program/erase (P/E) operation. The NVM utilizes a silicon-oxide-nitride-oxide-silicon (SONOS)-type structure with a trigate multiple nanowire (NW) channels. The difference in the flicker noise (1/f) level between a multiple-channel NW device and a standard single-channel device became smaller after P/E cycling. The observation can be explained by the quantity of grain-boundary traps introduced by higher electric field at the NW corner during the P/E cycle, subsequently increasing the LFN level in the multiple NW SONOS-TFT.