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SRAM yield estimation in the early stage of the design cycle

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2 Author(s)
Von-Kyoung Kim ; Sun Microsyst., SPARC Technol. Bus., Mountain View, CA, USA ; Chen, T.

This paper describes an early memory yield prediction model using a memory sensitive area model. The proposed sensitive area prediction model calculates the sensitive area of a memory block for a given process technology and memory capacity. The model is capable of predicting the yield of a memory block in the early design phase without the derailed knowledge of the physical layout. The use of such a model in the early design stage helps to improve product quality and to reduce cost

Published in:

Memory Technology, Design and Testing, 1997. Proceedings., International Workshop on

Date of Conference:

11-12 Aug 1997

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