By Topic

Thermal modeling of active embedded chip into high density electronic board

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Dia, C.T. ; THALES GLOBAL SERVICES, Meudon la foret, France ; Monier-Vinard, E. ; Bissuel, V. ; Daniel, O.

The recent PWB embedding technology is an attractive packaging alternative that allows a very high degree of miniaturization by stacking multiple core layers of embedded chips, using copper filled micro-vias as interconnections to improve electrical performances. The adoption of disruptive technology in future PWB designs will further increase the thermal management challenges by concentrating heat dissipation at the heart of the organic substrate and exacerbate the need of adequate cooling. In order to allow the electronic designer to early analyse the limits of the power dissipation, depending on the embedded chip location inside the board, as well as the chip thermal interactions with other chips or SMD components, an analytic thermal modelling approach has been established. The presented work describes the comparison of the analytic model results with the numerical detailed models of various embedded chips, and debates about the need or not to simulate in full details the embedded chips as well as the surrounding layers and micro-via structures of the substrate. The thermal behaviour predictions of the analytic model, found to be within ±10% of relative error, demonstrate its relevance to model an embedded chip and its neighbouring heating chips or components. The proposed approach promotes a new practical solution to achieve a more efficient design and to early identify the potential issues of board cooling.

Published in:

Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), 2012 13th International Conference on

Date of Conference:

16-18 April 2012