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Analysis and Design of a High Speed Continuous-time \Delta \Sigma Modulator Using the Assisted Opamp Technique

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3 Author(s)
Ankesh Jain ; Department of Electrical Engineering, Indian Institute of Technology, Madras Chennai, India ; Muthusubramaniam Venkatesan ; Shanthi Pavan

We apply the “assisted opamp technique” to the design of a 1 GS/s single-bit continuous-time ΔΣ modulator (CTDSM) that achieves 10 bit resolution in 15.625 MHz bandwidth. The enhanced linearity and speed of the first integrator of the modulator, necessitated by single-bit operation, are obtained in a power efficient manner using opamp assistance. However, timing-skew between the feedback and assistant DAC currents can be a potential problem at high speeds. We analyze and give intuition for the effects of timing mismatch in such CTDSMs, and show that opamp assistance is quite robust to timing errors. Measurement results from an implementation in a 0.13 μ m CMOS process show that the modulator achieves a dynamic range of 67 dB in 15.625 MHz bandwidth while consuming 4 mW.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:47 ,  Issue: 7 )