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Truncated-matrix multipliers with coefficient shifting

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2 Author(s)
E. George Walters ; Penn State Erie, The Behrend College, USA ; Michael J. Schulte

Truncated-matrix multipliers offer significant reductions in area, power, and delay, at the expense of increased computational error. These tradeoffs make them an attractive choice for many signal processing systems such as FIR filters. This paper presents a method for shifting coefficients that significantly reduces the error in systems that use truncated-matrix multipliers. This method allows further reductions in area, power, and delay while maintaining the overall accuracy of the system.

Published in:

2011 Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers (ASILOMAR)

Date of Conference:

6-9 Nov. 2011