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A power efficient and constant-gm 1.8 V CMOS operational transconductance amplifier with rail-to-rail input and output ranges for charge pump in phase-locked loop

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2 Author(s)
Hati, M.K. ; Adv. Technol. Dev. Centre, Indian Inst. of Technol., Kharagpur, India ; Bhattacharyya, T.K.

This paper presents a power efficient and constant-gm 1.8 V CMOS operational transconductance amplifier with rail-to-rail input and output ranges implemented in 180 nm CMOS process technology. The op-amp consists of constant-gm rail-to-rail input stage, folded cascode summing stage and class AB output stage. This operational transconductance amplifier provides a dc gain of 60.49dB, phase margin 59.64°, and unity gain frequency 538.3MHz while driving a 1pF capacitance and power consumption is 2.13mW from a 1.8 V power supply. It is simply a compound structure, consists of NMOS and PMOS differential pairs are connected in parallel. The compound structure achieves rail-to-rail operation; however, it produces variations of the transconductance 6.5 % and dc gain varies from 57dB-60.50dB over the input common mode range. This paper discusses sources and solutions for the transconductance variations using 1:3 current mirror techniques.

Published in:

Devices, Circuits and Systems (ICDCS), 2012 International Conference on

Date of Conference:

15-16 March 2012