Universal reprogrammable architecture for implementation dedicated image processors based on FPGA

An universal reprogrammable architecture for implementation of the dedicated image processors (DIP) is presented. This paper considers a new strategy of implementation of the DIP based on replacing specialized hardware by a reprogrammable structure. It affords the possibility of creating a flexible image processing system consisting of a reprogrammable hardware structure. The flexible processing system links real-time hardware processing speed with the flexibility of software processing. A new outlook of software and hardware cooperation and co-design in image processing is presented.