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The hybrid floating gate (FG) concept, previously demonstrated in FG capacitors, has been proven in fully integrated stacked memory cells. Results not only confirm the high potential of the concept in terms of improved program performance, but also show excellent data retention and program/erase cycling endurance. Key for achieving this result has been the optimization of the sidewall and spacer processing. Hybrid FG cells are therefore a viable solution to extend the nand Flash memory roadmap below the 20-nm technology node.