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A Novel Short-Channel Model for Threshold Voltage of Trigate MOSFETs With Localized Trapped Charges

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1 Author(s)
Te-Kuang Chiang ; Advanced Devices Simulation Laboratory, Department of Electrical Engineering, National University of Kaohsiung, Kaohsiung, Taiwan

Based on the scaling equation and perimeter-weighted-sum approach, a novel short-channel threshold voltage model for the trigate (TG) MOSFETs with localized interface trapped charges is developed by considering the effects of equivalent oxide charges on the flatband voltage. The model shows how the positive/negative trapped charges, silicon thickness, silicon width, oxide thickness, and normalized damaged zone affect the threshold voltage behavior. The model is verified by the 3-D device simulator “DESSIS” and can be efficiently used to investigate the hot-carrier-induced threshold voltage degradation of the advanced TG charge-trapped memory device.

Published in:

IEEE Transactions on Device and Materials Reliability  (Volume:12 ,  Issue: 2 )