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Circuit bottom fan-in and computational power

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3 Author(s)
Cai, L. ; Sch. of Electr. & Comput. Sci., Ohio Univ., Athens, OH, USA ; Jianer Chen ; Hastad, J.

We investigate the relationship between circuit bottom fan-in and circuit size when circuit depth is fixed. We show that in order to compute certain functions, a moderate reduction in circuit bottom fan-in will cause significant increase in circuit size. In particular, we prove that there are functions that are computable by circuits of linear size and depth k with bottom fan-in 2 but require exponential size for circuits of depth k with bottom fan-in 1. A general scheme is established to study the trade-off between circuit bottom fan-in and circuit size. Based on this scheme, we are able to prove, for example, that for any integer c, there are functions that are computable by circuits of linear size and depth k with bottom fan-in O(log n) but require exponential size for circuits of depth k with bottom fan-in c, and that for any constant ε>0, there are functions that are computable by circuits of linear size and depth k with bottom fan-in log n but require superpolynomial size for circuits of depth k with bottom fan-in O(log1-εn). A consequence of these results is that the three input read-modes of alternating Turing machines proposed in the literature are all distinct

Published in:
Computational Complexity, 1997. Proceedings., Twelfth Annual IEEE Conference on (Formerly: Structure in Complexity Theory Conference)

Date of Conference: 24-27 Jun 1997

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