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High Performance by Exploiting Information Locality through Reverse Computing

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2 Author(s)
Bahi, M. ; INRIA Saclay - Ile-de-France, Orsay, France ; Eisenbeis, C.

In this paper we present performance results for our register rematerialization technique based on reverse recomputing. Rematerialization adds instructions and we show on one specifically designed example that reverse computing alleviates the impact of these additional instructions on performance. We also show how thread parallelism may be optimized on GPUs by performing register allocation with reverse recomputing that increases the number of threads per Streaming Multiprocessor (SM). This is done on the main kernel of Lattice Quantum Chromo Dynamics (LQCD) simulation program where we gain a 10.84% speedup.

Published in:

Computer Architecture and High Performance Computing (SBAC-PAD), 2011 23rd International Symposium on

Date of Conference:

26-29 Oct. 2011

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