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Design and implementation of 1 GHz high speed data acquisition system

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3 Author(s)
Lin, Zou ; School of Electronic Engineering, Univ. of Electronic Science and Technology of China, Chengdu 610054, P. R. China ; Xuegang, Wang ; Lu, Qian

With the development of current electronic technology, numerous high-speed data acquisition systems provide a variety of potential benefits. This article describes a high-speed data acquisition system which consists of ECL logic and TTL logic devices, samples and stores data with a 1 GHz Hz clock. This system is accomplished easily and works stably. A performance test of this system has been undertaken and the results show that the effective number of bits (ENOB) is more than 6.5 bits.

Published in:

Systems Engineering and Electronics, Journal of  (Volume:20 ,  Issue: 1 )