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Frequency divider is one of the most significant blocks in Millimeter-wave communication system and becomes a research hotspot in recent years. However, most of the research works only focus on high operating frequency, but neglect output power, which can not ensure the following frequency division. In this paper, a new design process for static divider concerning both operating frequency and output power is proposed. By using this design process, an 8:1 static divider is implemented in 0.13-μm CMOS technology. From measurement results, it will be shown that the divider operates up to 34 GHz with 0 dBm input and consumes 14.5 mA with 1.2 V power supply including 3 mA for output buffer.