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A three-phase three-level dc-to-dc phase-shifted pulsewidth-modulation (PSPWM) converter which is reported in the literature for high-power and high-input-voltage applications is based on a three-phase three-wire configuration. However, the controllable duty cycle range of the aforementioned converter is 0-2π/3. Therefore, to obtain the rated voltage, the converter needs to be overrated by 33%. In order to overcome this problem, a modified topology of the three-level dc-to-dc PSPWM converter based on a three-phase four-wire configuration is proposed. The soft switching of devices is achieved by using a tapped filter inductor. The output voltage is controlled by incorporating PSPWM. The clocked gate signals of each leg are phase shifted by 2π/3 from each other. Major features of the converter include the following: 1) The outer two switches of each leg are operating as zero-voltage switch; 2) the inner two switches of each leg are operating as zero-current switch; and 3) this is achieved without involving any extra passive or active components. Realization of the secondary output filter by having a tapped inductor leads to considerable reduction in circulating current flow during a freewheeling period and results in appreciable mitigation in conduction losses. In order to obtain the behavioral and performance characteristics of the converter topology, analytical and simulation studies are carried out, and the viability of the scheme is ascertained through detailed experimental studies.