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On the Cascade Implementation of Multiple-Output Sparse Logic Functions

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2 Author(s)
V´clav Dvorak ; Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic ; Petr Mikusek

Representation of multiple-output logic functions by Multi-Terminal Binary Decision Diagrams (MTBDDs) is studied for the useful class of sparse logic functions specified by the number of true min-terms. This paper derives upper bounds on the MTBDD width, which determine the size of look-up tables (LUTs) needed for hardware realization of these functions in FPGA logic synthesis. The obtained bounds are generalization of similar known bounds for single-output logic functions. Finally a procedure how to find the optimum mapping of MTBDD to a LUT cascade is presented and illustrated on a set of benchmarks.

Published in:

Digital System Design (DSD), 2011 14th Euromicro Conference on

Date of Conference:

Aug. 31 2011-Sept. 2 2011