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Techniques for improving coarse-grained reconfigurable architectures

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5 Author(s)
Kyuseung Han ; Sch. of EECS, Seoul Nat. Univ., Seoul, South Korea ; Seongsik Park ; Kiyoung Choi ; Jong Kyung Paek
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This paper presents various novel techniques for improving coarse-grained reconfigurable architectures. Specifically, it presents techniques for supporting IEEE single precision floating-point standard, efficient handling of loop-carried dependency with variable-length FIFOs, efficient mapping of control flows, and sharing data with a host processor for transparent binary acceleration. Experiments with benchmark examples demonstrate the effectiveness of the proposed techniques.

Published in:

2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS)

Date of Conference:

7-10 Aug. 2011