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Verifying that logic control satisfies some desirable properties is essential to the proper and safe functioning of a manufacturing system. Input order robustness is one such property that has not been thoroughly explored. If a logic controller is input order robust for all sets of inputs whose elements can arrive in any order and whose order should not affect the logic controller's final state or set of outputs, then the logic controller behaves the same in these regards irrespective of the inputs' order. This paper develops a procedure to verify input order robustness for logic controllers implemented in a variety of formalisms, and demonstrates its application on Event-Condition-Action Modular Finite-State Machines (ECA MFSM) and IEC 61499 controllers. Additionally, this verification is extended to a class of networks of controllers, and the computational complexity of such verifications are discussed.