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Optimisation and fabrication of low-stress, low-temperature silicon oxide cantilevers

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3 Author(s)
Kshirsagar, A. ; Dept. of Electr. Eng., Indian Inst. of Technol. - Bombay, Mumbai, India ; Duttagupta, S.P. ; Gangal, S.A.

Modern lab-on-a-chip systems can benefit from integration of nanoelectromechanical system/microelectromechanical system (NEMS/MEMS) and complementary metal-oxide semiconductor technology with emphasis on low temperature processing. In the present work process, parameters for deposition of silicon oxide (SiOx) by inductively coupled plasma chemical vapour deposition (ICPCVD) at low temperature (70°C) are optimised. The sacrificial layer poly(methyl methacrylate) (PMMA) is in-house prepared and optimised. This PMMA sacrificial solution not only gives a low cost wide range of viscosity solutions, but it is also low temperature NEMS process compatible. With optimisations mentioned above, it has been possible to fabricate the whole device without exceeding the thermal budget 100°C. To the best of the authors° knowledge, this is the first report on sub-100°C, surface micromachined SiOx cantilevers deposited by ICPCVD and using PMMA as the sacrificial layer for low temperature NEMS applications.

Published in:

Micro & Nano Letters, IET  (Volume:6 ,  Issue: 7 )

Date of Publication:

July 2011

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