This paper presents a methodology for generating streaming architectures from ordinary programs. It automatically identifies streaming relationships and translates them into parallel computational kernels connected with customized stream buffers. New optimizations are introduced that reduce resource utilization by automatically generating lower bounds on stream buffer sizes. The approach also statically analyzes the design for deadlock and determines appropriate strategies to guarantee prevention. The experimental results show 19-325% improvement in performance and 15-62% reduction in area over non-streaming designs of several software-defined radio applications. This framework allows system-level designers to develop optimized reconfigurable streaming architectures for FPGAs at compile-time.
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Adaptive Hardware and Systems (AHS), 2011 NASA/ESA Conference on
Date of Conference: 6-9 June 2011