By Topic

Cost-efficient built-in repair analysis for embedded memories with on-chip ECC

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Hongbin Sun ; Inst. of Artificial Intell. & Robot., Xi''an Jiaotong Univ., Xi''an, China ; Jizhong Zhao ; Fei Wang ; Nanning Zheng
more authors

This paper concerns low-cost implementation of built-in repair analysis (BIRA) for embedded memories. As embedded memories become more and more dominant in system-on-chip (SoC) design, it is very crucial to achieve sufficiently high embedded memory yield. Due to the increasing number of diversified embedded memories on chip, external memory testing and redundancy repair analysis become inadequate and the use of BIRA becomes more attractive and even indispensable. The essential challenge of BIRA design is to how to minimize its unnegligible implementation cost without sacrificing the achievable repair rate. The key feature that distinguishes this work from prior work is that, motivated by the fact that almost all the embedded memories use error correction code (ECC) for soft error tolerance, we propose to appropriately leverage such existing built-in error correction capability to enable very low-cost BIRA implementations while maintaining the same and even higher defect repair rate and the same soft error tolerance. With this underlying theme, this paper presents a specific design solution, and its effectiveness and advantages over existing solutions has been successfully demonstrated using computer simulations.

Published in:

Access Spaces (ISAS), 2011 1st International Symposium on

Date of Conference:

17-19 June 2011