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An ultra low voltage ultra low power folded cascode CMOS LNA using forward body bias technology for GPS application

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4 Author(s)
Kargaran, E. ; Sadjad Inst. for Higher Educ., Mashhad, Iran ; Nabovati, Ghazal ; Mafinezhad, Khalil ; Nabovati, Hooman

A fully integrated low noise amplifier suitable for ultra-low voltage and ultra-low-power GPS applications is designed and simulated in a standard 0.18 μm CMOS technology. By employing the folded cascode and forward body bias technique, the proposed LNA can operate at a reduced supply voltage and power consumption. The proposed LNA delivers a power gain (S21) of 17.6 dB with a noise figure of 3 dB, while consuming only 960 μW dc power with an ultra low supply voltage of 0.45 V. The power consumption figure of merit (FOM1) and the tuning-range figure of merit (FOM2) are optimal at 18.33 dB/mw and 8.8 (v.mw)-1, respectively.

Published in:

Electrical Engineering (ICEE), 2011 19th Iranian Conference on

Date of Conference:

17-19 May 2011