Skip to Main Content
This paper presents a low-cost production test strategy for digitally-calibrated analog-to-digital converters (ADCs) that incorporate an equalization-based background calibration scheme. The test time of these designs is dominated by the long calibration time required prior to conducting the final testing. To reduce overall test time, we present a two-step calibration approach that significantly reduces calibration time without compromising test coverage. In addition, by analyzing the data obtained in calibration, devices that fail certain static or dynamic specifications can be identified without incurring any additional test time beyond calibration, thereby enabling early rejection. To minimize calibration time and maximize failing symptoms for fault detection, we propose using specific calibration stimuli. Simulation results for a pipelined ADC shows that the proposed strategy reduces the total test time by 80%. This is achieved by reducing the calibration time, as well as by prescreening a good fraction of defective devices that fail static and dynamic specifications including the gain/offset errors and the effective number of bits (ENOB).
Circuits and Systems I: Regular Papers, IEEE Transactions on (Volume:58 , Issue: 12 )
Date of Publication: Dec. 2011