Accelerated design rule (DR) shrinkage is introducing new challenges to the world of process control, yield monitoring and wafer inspection (WI). One of the main challenges of WI is the detection of small defects below the optical resolution limit of the inspection systems. This paper present a new optical scheme for inspection of advanced SRAM patterns and demonstrates the significant value of the transition from pattern contrast detection to dark background detection by applying tailored light illumination and collection techniques. This work demonstrates the sensitivity improvement of this approach on two advanced 2xnm DR devices. This scheme, compared with current methods, demonstrates enhanced defect signal to noise ratio (SNR), enhanced defect capture rate, and higher throughput.
Published in:
Advanced Semiconductor Manufacturing Conference (ASMC), 2011 22nd Annual IEEE/SEMI
Date of Conference: 16-18 May 2011