Referenced Items are not available for this document.
Rigel is a single-chip accelerator architecture with 1,024 independent processing cores targeted at a broad class of data- and task-parallel computation. This article discusses Rigel's motivation, evaluates its performance scalability as well as power and area requirements, and explores memory systems in the context of 1,024-core single-chip accelerators. The authors also consider future opportunities and challenges for large-scale designs.
Published in:
Micro, IEEE
(Volume:31
,
Issue:
4
)
Date of Publication: July-Aug. 2011
- Page(s):
- 30 - 41
- ISSN :
- 0272-1732
- INSPEC Accession Number:
- 12175385
- Digital Object Identifier :
- 10.1109/MM.2011.40
- Product Type:
- Journals & Magazines
- Date of Publication :
- 09 June 2011
- Date of Current Version :
- 28 July 2011
- Issue Date :
- July-Aug. 2011
- Sponsored by :
- IEEE Computer Society
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