By Topic

A switched-current sample-and-hold circuit

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Xiaoyun Hu ; Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada ; K. W. Martin

A switched-current sample-and-hold circuit is reported. The circuit was fabricated in a 0.8-μm BiCMOS process. Measurements indicate a sampling frequency of 57 MHz with 60 dB signal-to-noise-plus-distortion-ratio and suggest that operation at sampling frequencies beyond 80 MHz is feasible. Comparisons of this circuit with other switched-current sample-and-hold circuits are given to highlight the strengths and weaknesses of the circuit. The feasibility of the sample-and-hold circuit as an under-sampler intended for the Canadian CT2Plus personal communication system is also presented

Published in:

IEEE Journal of Solid-State Circuits  (Volume:32 ,  Issue: 6 )