Scheduled System Maintenance:
On May 6th, system maintenance will take place from 8:00 AM - 12:00 PM ET (12:00 - 16:00 UTC). During this time, there may be intermittent impact on performance. We apologize for the inconvenience.
By Topic

Design and VLSI implementation of CSD filter for pre-processing of image signals

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.
3 Author(s)
Yoon Gi Yang ; Samsung Electron. Co. Ltd., Seoul, South Korea ; Nam Ik Cho ; Sang Uk Lee

In this paper, we investigate the design and VLSI implementation of CSD (canonic signed digit) coefficient filters for high speed digital filtering. First, CSD coefficient filters are designed, which can be used as format conversion filters in place of the ones employed for the MPEG2 TM5 (test model 5). It is shown that the proposed CSD filters perform better than the conventional one, while having lower hardware complexity. Second, the pipelined bit-serial and bit-parallel architectures for the CSD filter are proposed and verified through the VHDL simulation

Published in:

Electronics, Circuits, and Systems, 1996. ICECS '96., Proceedings of the Third IEEE International Conference on  (Volume:2 )

Date of Conference:

13-16 Oct 1996