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Design and implementation of a CMOS operational amplifier architecture with dual common-mode feedback loop

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2 Author(s)
Papananos, Y. ; Div. of Comput. Sci., Athens Nat. Tech. Univ., Greece ; Tsividis, Y.

In this paper, the design and VLSI implementation of a fully balanced op amp in CMOS technology is presented. The op amp uses a dual common-mode (CM) feedback loop architecture which is compared to a single CM feedback loop techniques. Experimental measurements on the fabricated chip are presented

Published in:
Electronics, Circuits, and Systems, 1996. ICECS '96., Proceedings of the Third IEEE International Conference on  (Volume:2 )

Date of Conference: 13-16 Oct 1996

Page(s):
904 - 907 vol.2
Meeting Date :
13 Oct 1996-16 Oct 1996
Print ISBN:
0-7803-3650-X
INSPEC Accession Number:
5643875
Conference Location :
Rodos
Digital Object Identifier :
10.1109/ICECS.1996.584531
Product Type:
Conference Publications

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