Efficient sorting and routing on reconfigurable meshes using restricted bus length

Sorting and balanced routing problems for synchronous mesh-like processor networks with reconfigurable buses are considered. Induced by the argument that broadcasting along buses of arbitrary length within unit time seems rather non-realistic, we consider basic problems on reconfigurable meshes that can be solved efficiently even with restricted bus length. It is shown that on r-dimensional reconfigurable meshes of side length n with bus length bounded to a constant l the h-h sorting and routing problem can be solved within hn+o(hrn) steps in any case and in hn/2+o(hrn) steps with high probability, provided that hl/spl ges/4r. This result is due to a data concentration method that is explained in the paper and it will hold even for certain very light loadings, i.e. with significantly less than one elements per processor on average. Extensions to two-dimensional reconfigurable meshes with diagonal links are considered.