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Experiences applying framework-based functional verification to a design for programmable logic

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4 Author(s)
Goni, O. ; INTIA Inst., Univ. Nac. del Centro de la, Buenos Aires, Argentina ; Vazquez, M. ; Todorovich, E. ; Sutter, G.

This paper presents experiences in applying modern functional verification to a configurable decimal floating point Adder / Subtractor core targeted to programmable logic. Despite its huge input space, a number of hard-to-verify corner cases are identified. Two different verification frameworks were applied in order to develop testbenches: OVM and Truss. These tesbenches were built to be independent of the ALU operand representation and IEEE754-2008 specific modules were also implemented. Verification results, the experience itself, and a comparative study of the alternatives was made and summarized for designers and verification engineers.

Published in:

Programmable Logic (SPL), 2011 VII Southern Conference on

Date of Conference:

13-15 April 2011

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