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Recent experiments have demonstrated the ability to alleviate Fermi-level pinning, resulting in reduced Schottky barrier heights (SBHs) and reduced contact resistivity by inserting thin layers of dielectric at the contact interface. In this letter, FinFETs with dielectric SBH tuning layers are investigated and shown to have reduced contact resistance over the control wafer. The reduced contact resistivity results in an ≈25% increase in drive current as well as a reduction of RS/D by 100 Ω · μm. Contact chain measurement shows a 10-Ω · μm2 reduction in specific contact resistivity over the control wafer associated with a 100-meV reduction in SBH. Routes to further improvements in device performance are discussed, including key material considerations for dielectric tuning layers.