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Formal Verification of C-element Circuits

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4 Author(s)
Chao Yan ; Dept. of Comput. Sci., Univ. of British Columbia, Vancouver, BC, Canada ; Ouchet, F. ; Fesquet, L. ; Morin-Allory, K.

It is well known that the correct behavior of asynchronous circuits is not guaranteed when the inputs switch too slowly. The erroneous behavior is generally difficult to be spotted by simulation based methods. We applied formal methods to study the analog switching behavior of a full-buffer circuit composed of C-elements. We used our reach ability analysis tool COHO to compute all reachable states of two C-element designs and verified several analog properties. Based on these properties, we identified a sufficient condition under which the full-buffer circuit always supports the designed handshaking protocol. We also improved the COHO tool to automate the verification process, reduce error and improve performance.

Published in:

Asynchronous Circuits and Systems (ASYNC), 2011 17th IEEE International Symposium on

Date of Conference:

27-29 April 2011