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Low-Stress CMOS-Compatible Silicon Carbide Surface-Micromachining Technology—Part I: Process Development and Characterization

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4 Author(s)
Nabki, F. ; Dept. of Comput. Sci., Univ. du Quebec a Montreal (UQAM), Montreal, QC, Canada ; Dusatko, T.A. ; Vengallatore, S. ; El-Gamal, M.N.

A low-temperature (<; 300 °C) low-stress microelectromechanical systems fabrication process based on a silicon carbide structural layer is presented. A partially conductive sintered target enables low-temperature dc sputtering of amorphous silicon carbide (SiC) at high deposition rates (75 nm/min). The low stress of the structural film allows for mechanically reliable structures to be fabricated, while the low-temperature deposition allows for pre-SiC metallization. The process is designed for low-cost film deposition and for complementary metal-oxide-semiconductor postintegration, stemming from chemical and thermal compatibility. Process flow, deposition, etching, and stress control are discussed, and a detailed process characterization is reported.

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Microelectromechanical Systems, Journal of  (Volume:20 ,  Issue: 3 )